Engineering | Engineering Technical Services

ETS Information Technology Support

Cadence

<< Back to Software

Information is provided ‘as is’ without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment.

EEE classes using the Cadence Toolset are:

  • EEE 425 : Digital Systems and Circuits
    • Course Description : Digital logic gate analysis and design. Propagation delay times, fan out, power dissipation, noise margins. Design of MOS and bipolar logic families, including NMOS, CMOS, standard and advanced TTL, ECL, and BiCMOS. Inverter, combinational and sequential logic circuit design, MOS memories, VLSI circuits. Computer simulations using PSPICE.
  • EEE 433 : Analog Integrated Circuits
    • Course Description : Analysis, design, and applications of modern analog circuits using integrated bipolar and field effect transistor technologies.
    • Products used :
      • Composer for schematic entry and as our primary design environment
      • Symbol editor for using a hierarchical design and creating test benches
      • The spectre simulator in the Analog Design Environment
        • DC, Transient, and AC analyses for basic design simulations
        • DC and AC sweeps and the Parametric Analysis tool for rapid design variation
        • Periodic Steady State Analysis for Fourier/Distortion analysis
        • The Calculator for waveform arithmetic operations: (e.g. power and THD)
      • Virtuoso for layout entry, schematic realization
        • DRC
        • LVS
        • Extraction and back annotation
        • Simulations, same as performed on schematic design
  • EEE 517 : Hardware Design Languages
    • Course Description : Introduces hardware design languages. Modeling concepts for specification, simulation, and synthesis.
    • Products used :
      • Virtuoso Front to Back Design Environment 5.10.41.500.0.7
      • Schemetic Design : Virtuoso Schemetic Editor 5.10.41.500.0.7
      • Layout design : Virtuoso Layout Editor 5.10.41.500.0.7
      • Analysis : Virtuoso Analog Design Environment
      • Simulator : Spectre/SpectreS/HSPICE/Verilog/SpectreVerilog
      • Verification in the Layout : DRC, LVS and Extractor
      • Specific tool-kits used : For EEE527 : Obtained from NCSU (TSMC 0.60um, TSMC 0.40um, TSMC 0.30um, TSMC 0.18um )
        • process used yet to be decided
  • EEE 523 : Advanced Analog Integrated Circuits
    • Course Description : Analysis and design of analog integrated circuits: analog circuit blocks, reference circuits, operational-amplifier circuits, feedback, and nonlinear circuits.
  • EEE 524 : Communications Transceiver Circuits Design
    • Course Description : Analysis and design of Very Large Scale Integrated (VLSI) circuits. Physics of small devices, fabrication, regular structures, and system timing. Open only to graduate students.
    • Product used :
      • Cadence Toolsuite : v5.1.0
      • Design Entry : Virtuoso Schematic Editor
      • Layout : Virtuoso Layout XL
      • Simulation : Analog Design Environment, choice of simulator: Spectre/SpectreS/HSPICE/Verilog/SpectreVerilog
      • DRC+LVS : Diva + Assura
  • EEE 525 : VLSI Design
    • Course Description : Analysis and design of Very Large Scale Integrated (VLSI) circuits. Physics of small devices, fabrication, regular structures, and system timing.
    • Product used :
      • Cadence Toolsuite : v5.1.0
      • Design Entry : Virtuoso Schematic Editor
      • Layout : Virtuoso Layout XL
      • Simulation : Analog Design Environment, choice of simulator: Spectre/SpectreS/HSPICE/Verilog/SpectreVerilog
      • DRC+LVS : Diva + Assura
      • Specific tool-kits used : Obtained from NCSU (HIP 1.6um, TSMC 0.40um, TSMC 0.30um, TSMC 0.18um )
        • 0.25µm use for the class.
  • EEE 527 : Analog to Digital Converters
  • Course Description : Detailed introduction to the design of Nyquist rate, CMOS analog to digital converters.
  • Products used :
    • Virtuoso Front to Back Design Environment 5.10.41.500.0.7
    • Schemetic Design : Virtuoso Schemetic Editor 5.10.41.500.0.7
    • Layout design : Virtuoso Layout Editor 5.10.41.500.0.7
    • Analysis : Virtuoso Analog Design Environment
    • Simulator : Spectre/SpectreS/HSPICE/Verilog/SpectreVerilog
    • Verification in the Layout : DRC, LVS and Extractor
    • Specific tool-kits used : Obtained from NCSU (TSMC 0.60um, TSMC 0.40um, TSMC 0.30um, TSMC 0.18um )
      • 0.45µm use for the class.

Research Projects using the Cadence Toolset are:

  • Connection One
    • Mission Statement : Connection One is a National Science Foundation Industry/University Cooperative Research Center established by the Arizona State University Ira A. Fulton School of Engineering. The primary focus of Connection One is on communication circuits and systems to enable higher integration and smaller communication devices to facilitate system-on-a-chip (SOC).
    • Products used :
      • Cadence Toolsuite : v5.1.0
      • Design Entry : Virtuoso Schematic Editor
      • Layout : Virtuoso Layout XL
      • Simulation : Analog Design Environment, choice of simulator: Spectre/SpectreS/HSPICE/Verilog/SpectreVerilog/Ultrasim
      • DRC+LVS : Diva + Assura
  • WINTech
    • The goal of WINTech is to improve the current standard of living through the design and advancement of small, highly integrated electrical and electro-mechanical systems.
    • Products used:
      • Cadence Toolsuite : v5.1.0
      • Design Entry : Virtuoso Schematic Editor
      • Layout : Virtuoso Layout XL
      • Simulation : Analog Design Environment, choice of simulator: Spectre/SpectreS/HSPICE/Verilog/SpectreVerilog/Ultrasim
      • DRC+LVS : Diva + Assura
  • Computing Systems Research Lab

Cadence Links:

Cadence® is a registered trademark of Cadence Design System, Inc.
2655 Seely Avenue, San Jose, CA 95134

Contact Information:

Connection One / WINTech Research Centers
Ira A. Fulton School of Engineering
Arizona State University
Goldwater Bldg. Room 374
Tempe, Arizona 85287
Phone: 480.727.8581


Polytechnic classes using the Cadence Toolset are:

EGR 304:

Course description: Analyze, design, implement, and debug an electrical or robotic electromechanical system through an in-depth electrical and/or robotic system design project. Develops professional and engineering skills in this project setting.

Products used: SPB (PCB)

EGR 305:

Course description: Analyze, design, implement, and debug an electrical or robotic electromechanical system through an in-depth electrical and/or robotic system design project. Develops professional and engineering skills in this project setting.

Products used: SPB (PCB)

EGR 314:

Course description: Applies design principles to conceptualize, implement, and characterize an electrical or electromechanical robotic system in a project setting. Project emphasizes communication with project stakeholders; applying a human-centered design approach in the context of an electrical system; critical thinking in developing system specifications and evaluating a prototype relative to these specifications; and increasing technical competence.

Products used: SPB (PCB)

EGR 315:

Course description: Applies design principles to conceptualize, implement, and characterize an electrical or electromechanical robotic system in a project setting. Project emphasizes communication with project stakeholders; applying a human-centered design approach in the context of an electrical system; critical thinking in developing system specifications and evaluating a prototype relative to these specifications; and increasing technical competence.

Products used: SPB (PCB)

Contact Information:

The Polytechnic School Administration
Ira A. Fulton School of Engineering
Arizona State University
6049 S. Backus Mall Sutton Hall 140 Suite
Mesa, AZ 85212
Phone: 480.727.1177